A Blind Calibration Scheme for Switched-Capacitor Pipeline Analog-to-Digital Converters

dc.contributor.authorBozzo Jiménez Juan Andrés
dc.contributor.authorAbusleme Hoffman, Ángel Christian
dc.contributor.authorMartinez, J. S.
dc.date.accessioned2022-05-13T19:15:20Z
dc.date.available2022-05-13T19:15:20Z
dc.date.issued2020
dc.description.abstractA foreground calibration algorithm is proposed to digitally self-calibrate a switched-capacitor (SC), pipelined, analog-to-digital converter (ADC). Static errors resulting from capacitor mismatch, charge transfer loss (from limited amplifier dc gain) and variance in Multiplying DAC (MDAC) voltages are estimated and compensated for. The proposed algorithm reuses the electrical components of the pipeline stages to instantiate ΔΣ converters in the stages' interfaces. By feeding to those converters self-generated input signals and storing the output stream of codes, the algorithm is able to infer the electrical parameters of the reused elements. The algorithm does not require external stimulus or specialized circuitry to be used as true ground but depends on the stages sub-ADC threshold levels precision, diminishing its performance in circuits where error is dominated by sub-ADC input offset. A number of 10-bit ADC's with a mean uncalibrated Effective Number Of Bits (ENOB) of 6.3 bits where simulated, and a resolution improvement between 2.5 bits, for the best case, and 1 bit for the worst, were observed.
dc.fuente.origenIEEE
dc.identifier.doi10.1109/LASCAS45839.2020.9069047
dc.identifier.isbn978-1728134277
dc.identifier.issn2473-4667
dc.identifier.urihttps://doi.org/10.1109/LASCAS45839.2020.9069047
dc.identifier.urihttps://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=9069047
dc.identifier.urihttps://repositorio.uc.cl/handle/11534/63895
dc.information.autorucEscuela de ingeniería ; Bozzo Jiménez, Juan Andrés ; S/I ; 194589
dc.information.autorucEscuela de ingeniería ; Abusleme Hoffman, Ángel Christian ; S/I ; 2698
dc.language.isoen
dc.nota.accesoContenido parcial
dc.publisherIEEE
dc.relation.ispartofIEEE Latin American Symposium on Circuits & Systems (11° : 2020 : San José, Costa Rica)
dc.rightsacceso restringido
dc.subjectCapacitors
dc.subjectPipelines
dc.subjectCalibration
dc.subjectComputational modeling
dc.subjectUncertainty
dc.subjectCharge transfer
dc.subjectClocks
dc.titleA Blind Calibration Scheme for Switched-Capacitor Pipeline Analog-to-Digital Converterses_ES
dc.typecomunicación de congreso
sipa.codpersvinculados194589
sipa.codpersvinculados2698
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